Bus-invert coding with restricted hamming distance for multi-byte interfaces

ABSTRACT

An encoding process for bus data utilizes data from multiple data line groups on a multi-byte wide bus where each group has an associated DBI line. The process leverages the expanded encoding space for the multiple groups and associated multiple DBI bits. This process may be expanded to four bytes, eight bytes, etc.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims benefit under 35 U.S.C. 119 to U.S. applicationSer. No. 62/701,075, entitled “BUS-INVERT CODING WITH RESTRICTED HAMMINGDISTANCE FOR MULTI-BYTE INTERFACES”, filed on Jul. 20, 2018, andincorporated herein by reference in its entirety.

BACKGROUND

Conventional bus-invert coding inverts the polarity of all the data bits(and the added wire/bit called the DBI bit) when more than half thenumber of bits (including the DBI bit) switch polarity on the nextparallel data transmission on the bus. This avoids adjacent datatransitions in which more than one half of the bits change polarity. Forexample, using conventional DBI, on an 8-bit data bus with one DBI line,the total number of lines undergoing a change of polarity between bytetransmissions is between 0 and 4, which reduces simultaneous switchingoutput (SSO) noise by 50%.

BRIEF SUMMARY

Described herein are techniques to reduce the noise induced on a powersupply from several bus drivers simultaneously switching their outputs(SSO noise). The techniques work with the existing encoding/decodingmechanisms currently used in high-bandwidth memory (HMB) that utilizemultiple bytes in the decision algorithm. This enables a substantialreduction in the induced power supply noise while remaining backwardcompatible with existing bus communication mechanisms. The technique mayalso be applied to on-chip buses such as buses used to communicate databetween functional units on a graphics processing unit (GPU), between ageneral purpose central processor (CPU) and other circuits, or generallybetween an two circuit components that communicate over a bus.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

To easily identify the discussion of any particular element or act, themost significant digit or digits in a reference number refer to thefigure number in which that element is first introduced.

FIG. 1 illustrates an embodiment of an unterminated bus line 100.

FIG. 2 illustrates an embodiment of a conventional DBI technique 200.

FIG. 3 illustrates an embodiment of a data communication system 300.

FIG. 4 illustrates an embodiment of a 16-bit data bus 400.

FIG. 5 illustrates an embodiment of a 2-byte DBI encoding technique 500.

FIG. 6 illustrates an embodiment of a 32-bit data bus 600.

FIG. 7 illustrates an embodiment of a 4-byte DBI encoding technique 700.

FIG. 8 illustrates an 8-byte DBI encoding technique 800 in accordancewith one embodiment.

FIG. 9 is a block diagram of a computing system 900 within which thetechniques introduced herein may be embodied or carried out.

DETAILED DESCRIPTION

Techniques are disclosed to utilize data from multiple bytetransmissions on a multi-byte wide bus where each byte has an associatedDBI line. The technique leverages the expanded encoding space for themulti-byte data and associated multiple DBI bits. This enables themaximum number of polarity changes on the bus for a 16-bit datatransmission (+2 DBI bits), which reduces SSO noise by 75%. Thistechnique can be expanded to four bytes for a 32-bit data transmission(+4 DBI bits), which reduces SSO noise by 87.5%.

The techniques disclosed herein determine the Hamming Distance acrossmultiple bytes to further restrict the total data line transitionsbeyond what could be achieved by considering each byte of the busindependently. For each doubling of the number of bytes considered, andthe associated DBI bits, the aggregate Hamming Distance may be reducedby an incremental 50%, relative to using no encoding. Therefore, the SSOnoise is reduced by an additional incremental 50% each time the buswidth doubles. As the bus width expands, the SSO noise utilizing thedisclosed techniques approaches zero. Furthermore, this encodingtechnique may be effective in defeating systems that analyze powersupply fluctuations/variations to determine/decrypt encryptedinformation.

FIG. 1 illustrates an example of an unterminated bus line 100. Forsimplicity, the transmitter 102 (Tx) is illustrated as an inverterdesigned to have an output impedance that can drive the load,represented by the capacitance of the data line 106 and the receiver104, with appropriate rise and fall times for the operating rate. Whenthe transmitter 102 transitions the data line 106 from logic LO to logicHI, there is an impulse of current drawn from the V_(DDQ) power supply.When the transmitter 102 transitions the data line 106 from logic HI tologic LO, there is an impulse of current sunk into GND. This push andpull of current on the data line 106 is a source of SSO noise on busesthat utilize multiple data lines.

FIG. 2 illustrates a conventional DBI technique 200. The HammingDistance (HD) for the data and the DBI line setting for a next bus cycleas compared to the previous bus cycle is determined (block 202). If theHD is less than or equal to half the number of data lines N (decisionblock 204), the DBI line is set to zero (block 206) and the data bitsare not inverted (block 208). The HD is greater than N/2 (decision block210), then DBI is set to 1 (block 212) and the data bits are inverted(block 214).

FIG. 3 illustrates a data communication system 300 in one embodiment.The data communication system 300 comprises a GPU 302, a DBI encoder304, a transmitter 306, a receiver 310, a DBI decoder 312, and a memory314. The GPU 302 generates data, e.g. results of computations, to storein the memory 314. The data output from the GPU 302 is received at theDBI encoder 304 and encoded in manner described herein, including theaddition of multiple DBI bits to the data. The DBI encoder 304 outputsthe encoded data to the transmitter 306 which generates the voltagesignaling on the data and DBI lines of the bus 308 to the receiver 310.The receiver 310 receives the signals from the data and DBI lines andprovides the signals to the DBI decoder 312, which decodes the data. Nochanges are required a conventional DBI decoder when using the describedencoding techniques. The decoded data is then stored in the memory 314.The techniques disclosed herein are useful for reducing SSO in systemssuch as the data communication system 300.

FIG. 4 illustrates an embodiment of a 16-bit data bus 400. The 16-bitdata bus 400 comprises two groups of data lines (group 1 402, group 2404) each having 8 data lines. The data lines in group 1 402 have anassociated DBI line (DBI1 406) and the data lines in group 2 have anassociated DBI line (DBI2 408). The layout of data lines and DBI linesin the 16-bit data bus 400 may vary in other implementations. Duringeach bus cycle, data bits are transmitted along the data lines (e.g.,one bit per line) as described above and a data inversion bit istransmitted by the associated DBI line. Each of the data bits may have avalue of “0” or “1” during each bus cycle. The Hamming Distance for eachline is “1” for a change in value (i.e., “0” to “1” or “1” to “0”) or“0” for no change in value (i.e., “0” to “0” or “1” to “1”). The HammingDistance for each line is then aggregated for each group. In someembodiments, the Hamming Distance for a group may be between 0 and 8,although it could also be larger than 8.

FIG. 5 illustrates a 2-byte DBI encoding technique 500 in accordancewith one embodiment. At block 502, the Hamming Distance is computed fortwo groups (group 1 and group 2) of data lines and their associated DBIlines DBI1 and DBI2 respectively. The Hamming Distance for group 1 isdenoted HD1, and the Hamming Distance for group 2 is denoted HD2. Atblock 504, the data and the data inversion bit of the group 1 and thegroup 2 are selectively inverted. The selective inversion may be basedon the conventional DBI technique 200 depicted in FIG. 2. At block 506,a second Hamming Distance (or encoded Hamming Distance), HD1′ and HD2′,is computed for each group, group 1′ and group 2′, respectively. Thesecond Hamming Distance, HD1′ and HD2′, is computed for the dataselectively inverted in block 504, that is the data for group 1′ andgroup 2′, Data1′ and Data2′. At decision block 508, the 2-byte DBIencoding technique 500 determines whether HD2′≥HD1′. In anotherembodiment, the 2-byte DBI encoding technique 500 determines whetherHD2′>HD1′. If so, at block 510 and block 512, the data for group 2′ isinverted and DBI2′ is inverted. In a first embodiment, at block 514 andblock 516, if HD1′>HD2′, the data for group 1′ is inverted and DBI1′ isinverted. In a second embodiment, if HD1′≥HD2′, the data for group 1′ isinverted and DBI1′ is inverted.

FIG. 6 illustrates an embodiment of a 32-bit data bus 600. The 32-bitdata bus 600 comprises four groups of data lines: group 1 602, group 2604, group 3 606, and group 4 608. Each group has an associated DBIline: respectively for group 1 602-group 4 608, DBI1 610, DBI2 612, DBI3614, and DBI4 616. The layout of data lines and DBI lines in the 32-bitdata bus 600 may vary in other implementations. As depicted, group 1 602is adjacent to group 2 604, while group 3 606 is adjacent to group 4608. In other embodiments, the lines may be arranged differently.Furthermore, the physical location of the lines may be utilized todetermine the group to which each line is assigned. In yet furtherembodiments, each group may comprise adjacent lines, while the groupnumber, which may determine that other group for inversion, is based onthe physical location of the group. For example, adjacent groups may beselected for encoding (depicted in FIG. 5). Other embodiments may selectnon-adjacent groups for encoding.

FIG. 7 illustrates a 4-byte DBI encoding technique 700 in accordancewith one embodiment. The 4-byte DBI encoding technique 700 extends the2-byte DBI encoding technique 500 to encode across four bytes of busdata (e.g., for a 32-bit data bus 600 with DBI lines as illustrated inFIG. 6). This encoding is achieved by treating the four bytes as a pairof byte-pairs. That is, the first pair of bytes (e.g., group 1 602 andgroup 2 604) are evaluated and encoded as a unit (block 702 and block704), and the second pair of bytes (e.g., group 3 606 and group 4 608)are evaluated and encoded as another unit (block 706 and block 708).Then, the combined Hamming Distance of the two byte-pairs are compared(decision block 710), and additional encoding operations are applied toone, or the other, byte-pair. This simplifies the overall encoding ofthe four bytes since each pair of bytes can utilize the same logic thatis needed for the previous encoding of the 2-byte DBI encoding technique500.

The first stage of the 4-byte DBI encoding technique 700 (block 702,block 704, block 706, and block 708) applies two encoders (see 2-byteDBI encoding technique 500), one to the raw byte pair of group 1/group 2(and their associated DBI lines), and another to the raw byte pair ofgroup 3/group 4 (and their associated DBI lines).

The second stage of the 4-byte DBI encoding technique 700 (decisionblock 710) applies the output from two encoders and compares thecombined Hamming Distance (HD1″+HD2″, respectively, where HDn″ is theHamming Distance of group 1/group 2 after the encoding of FIG. 5) forthe group 1/group 2 pair with the combined Hamming Distance (HD3″+HD4″,respectively, where HDn″ is the Hamming Distance of group 3/group 4after the encoding of FIG. 5) for the group 3/group 4 pair.

The third stage of the 4-byte DBI encoding technique 700 applies anencoding algorithm as follows:

-   -   1. If HD1″+HD2″≤HD3″+HD4″, then invert DBI3″ and DBI4″ (block        716) and invert group 3″ and group 4″ bits (block 718); and    -   2. If HD1″+HD2″>HD3″+HD4″, then invert DBI1″ and DBI2″ (block        712) and invert group 1″ and group 2″ bits (block 714).

In another embodiment, the third stage of the 4-byte DBI encodingtechnique 700 applies an encoding algorithm as follows:

-   -   3. If HD1″+HD2″<HD3″+HD4″, then invert DBI3″ and DBI4″ (block        716) and invert group 3″ and group 4″ bits (block 718); and    -   4. If HD1″+HD2″≥HD3″+HD4″, then invert DBI1″ and DBI2″ (block        712) and invert group 1″ and group 2″ bits (block 714).

In other words, the 4-byte DBI encoding technique 700 determines whichencoded byte-pair (and associated DBI bits) has the largest combinedHamming Distance, then inverts that byte-pair and the associated DBIbits. If the byte-pairs have the same combined Hamming Distance, thenthe 4-byte DBI encoding technique 700 may invert either byte-pair (i.e.,one and only one byte-pair) and the associated DBI bits based on theembodiment.

FIG. 8 illustrates an 8-byte DBI encoding technique 800 in accordancewith one embodiment. In a first stage (block 802, block 804, block 806,block 808, block 810, block 812, block 814, and block 816), low-toggleencoding is applied to each group. For example, if HDn>N/2, invert Datanand set DBIn=1. The first stage may utilize the conventional DBItechnique 200 depicted in FIG. 2.

During the second stage (block 818, block 820, block 822, and block824), the bytes are paired (e.g., group 1/group 2, group 3/group 4,group 5/group 6, and group 7/group 8). These byte pairs have theirencoded Hamming Distance compared and one group from the byte pair hasthe data bits and data inversion bit inverted. The second stage mayutilize the 2-byte DBI encoding technique 500 depicted in FIG. 5.

During the third stage (block 826 and block 828), the byte pair arefurther paired with another byte pair. Each byte pair has a combinedHamming Distance computed. The combined Hamming Distance is thencompared and one byte pair has the data bits and the data inversion bitinverted. The third stage may utilize the 4-byte DBI encoding technique700 depicted in FIG. 7.

During the fourth stage (block 830), a second combined Hamming Distanceis determined for the pairs of byte pairs that were compared during thethird stage. As depicted in FIG. 8, groups 1-4 and groups 5-8 have acombined Hamming Distance determined utilizing the data bits and datainversion bit that has been subject to the inversion encoding of theprevious stages. The second combined Hamming Distance is then comparedand one group of four bytes has their data bits and the data inversionbit inverted. The fourth stage of the 8-byte DBI encoding technique 800applies the previous stages as follows:

-   -   5. If HD1′″+HD2′″+HD3′″+HD4′″≤HD5′″+HD6′″+HD7′″+HD8′″, then        invert Data5′″, DBI5′″, Data6′″, DBI6′″, Data7′″, DBI7′″,        Data8′″ & DBI8′″    -   6. If HD1″+HD2″+HD3′″+HD4′″>HD5′″+HD6′″+HD7′″+HD8′″, then invert        Data1′″, DBI1′″, Data2′″, DBI2′″, Data3′″, DBI3′″, Data4′″ &        DBI4′″.

In another embodiment, the fourth stage of the 8-byte DBI encodingtechnique 800 applies an encoding algorithm as follows:

-   -   7. If HD1′″+HD2′″+HD3′″+HD4′″<HD5′″+HD6′″+HD7′″+HD8′″, then        invert Data5′″, DBI5′″, Data6′″, DBI6′″, Data7′″, DBI7′″,        Data8′″ & DBI8′″ and    -   8. If HD1′″+HD2′″+HD3′″+HD4′″≥HD5′″+HD6′″+HD7′″+HD8′″, then        invert Data1′″, DBI1′″, Data2′″, DBI2′″, Data3′″, DBI3′″,        Data4′″ & DBI4′″.

In other words, the 8-byte DBI encoding technique 800 determines whichencoded pair of byte-pairs (and associated DBI bits) has the largestcombined Hamming Distance, then inverts that pair of byte-pairs and theassociated DBI bits. If each of the pair of byte-pairs have the samecombined Hamming Distance, then the 8-byte DBI encoding technique 800may invert either pair of byte-pairs (i.e., one and only one pair ofbyte-pairs) and the associated DBI bits based on the embodiment.

FIG. 9 is a block diagram of one embodiment of a computing system 900 inwhich one or more aspects of the disclosure may be implemented. Thecomputing system 900 includes a system data bus 932, a CPU 902, inputdevices 908, a system memory 904, a graphics processing system 906, anddisplay devices 910. In alternate embodiments, the CPU 902, portions ofthe graphics processing system 906, the system data bus 932, or anycombination thereof, may be integrated into a single processing unit.Further, the functionality of the graphics processing system 906 may beincluded in a chipset or in some other type of special purposeprocessing unit or co-processor.

As shown, the system data bus 932 connects the CPU 902, the inputdevices 908, the system memory 904, and the graphics processing system906. In alternate embodiments, the system memory 904 may connectdirectly to the CPU 902. The CPU 902 receives user input from the inputdevices 908, executes programming instructions stored in the systemmemory 904, operates on data stored in the system memory 904 to performcomputational tasks. The system memory 904 typically includes dynamicrandom access memory (DRAM) employed to store programming instructionsand data. The graphics processing system 906 receives instructionstransmitted by the CPU 902 and processes the instructions, for exampleto implement aspects of the disclosed embodiments, and/or to render anddisplay graphics (e.g., images, tiles, video) on the display devices910.

As also shown, the system memory 904 includes an application program912, an API 914 (application programming interface), and a graphicsprocessing unit driver 916 (GPU driver). The application program 912generates calls to the API 914 to produce a desired set of computationalresults. For example, the application program 912 may transmit programsor functions thereof to the API 914 for processing within the graphicsprocessing unit driver 916.

The graphics processing system 906 includes a GPU 918 (graphicsprocessing unit), an on-chip GPU memory 922, an on-chip GPU data bus936, a GPU local memory 920, and a GPU data bus 934. Embodiments of thesystems and techniques disclosed herein may for example be utilized tocommunicate data on these busses and between these components. The GPU918 is configured to communicate with the on-chip GPU memory 922 via theon-chip GPU data bus 936 and with the GPU local memory 920 via the GPUdata bus 934. The GPU 918 may receive instructions transmitted by theCPU 902, process the instructions, and store results in the GPU localmemory 920. Subsequently, the GPU 918 may display certain graphicsstored in the GPU local memory 920 on the display devices 910.

The GPU 918 includes one or more logic blocks 924. The logic blocks 924may implement functionality such as graphics operations, encodingtechniques, artificial intelligence, matrix manipulation, and so on.

The disclosed embodiments may be utilized to communicate data betweenvarious components of the computing system 900. Exemplary componentcommunications include between the CPU 902 and/or the GPU 918 and thememory circuits, including the system memory 904, the GPU local memory920, and/or the on-chip GPU memory 922.

The GPU 918 may be provided with any amount of on-chip GPU memory 922and GPU local memory 920, including none, and may employ on-chip GPUmemory 922, GPU local memory 920, and system memory 904 in anycombination for memory operations.

The on-chip GPU memory 922 is configured to include GPU programming 928and on-Chip Buffers 930. The GPU programming 928 may be transmitted fromthe graphics processing unit driver 916 to the on-chip GPU memory 922via the system data bus 932. The GPU programming 928 may include thelogic blocks 924.

The GPU local memory 920 typically includes less expensive off-chipdynamic random access memory (DRAM) and is also employed to store dataand programming employed by the GPU 918. As shown, the GPU local memory920 includes a frame buffer 926. The frame buffer 926 may for examplestore data for example an image, e.g., a graphics surface, that may beemployed to drive the display devices 910. The frame buffer 926 mayinclude more than one surface so that the GPU 918 can render one surfacewhile a second surface is employed to drive the display devices 910.

The display devices 910 are one or more output devices capable ofemitting a visual image corresponding to an input data signal. Forexample, a display device may be built using a liquid crystal display,or any other suitable display system. The input data signals to thedisplay devices 910 are typically generated by scanning out the contentsof one or more frames of image data that is stored in the frame buffer926.

Terms used herein should be accorded their ordinary meaning in therelevant arts, or the meaning indicated by their use in context, but ifan express definition is provided, that meaning controls.

“Circuitry” refers to electrical circuitry having at least one discreteelectrical circuit, electrical circuitry having at least one integratedcircuit, electrical circuitry having at least one application specificintegrated circuit, circuitry forming a general purpose computing deviceconfigured by a computer program (e.g., a general purpose computerconfigured by a computer program which at least partially carries outprocesses or devices described herein, or a microprocessor configured bya computer program which at least partially carries out processes ordevices described herein), circuitry forming a memory device (e.g.,forms of random access memory), or circuitry forming a communicationsdevice (e.g., a modem, communications switch, or optical-electricalequipment).

“Firmware” refers to software logic embodied as processor-executableinstructions stored in read-only memories or media.

“Hardware” refers to logic embodied as analog or digital circuitry.

“Logic” refers to machine memory circuits, non transitory machinereadable media, and/or circuitry which by way of its material and/ormaterial-energy configuration comprises control and/or proceduralsignals, and/or settings and values (such as resistance, impedance,capacitance, inductance, current/voltage ratings, etc.), that may beapplied to influence the operation of a device. Magnetic media,electronic circuits, electrical and optical memory (both volatile andnonvolatile), and firmware are examples of logic. Logic specificallyexcludes pure signals or software per se (however does not excludemachine memories comprising software and thereby forming configurationsof matter).

“Software” refers to logic implemented as processor-executableinstructions in a machine memory (e.g. read/write volatile ornonvolatile memory or media).

“Bus” refers to a distinct set of conductors carrying data and controlsignals within a computer system, to which pieces of equipment may beconnected in parallel. Each of the conductors may be referred to linesor lanes.

Herein, references to “one embodiment” or “an embodiment” do notnecessarily refer to the same embodiment, although they may. Unless thecontext clearly requires otherwise, throughout the description and theclaims, the words “comprise,” “comprising,” and the like are to beconstrued in an inclusive sense as opposed to an exclusive or exhaustivesense; that is to say, in the sense of “including, but not limited to.”Words using the singular or plural number also include the plural orsingular number respectively, unless expressly limited to a single oneor multiple ones. Additionally, the words “herein,” “above,” “below” andwords of similar import, when used in this application, refer to thisapplication as a whole and not to any particular portions of thisapplication. When the claims use the word “or” in reference to a list oftwo or more items, that word covers all of the following interpretationsof the word: any of the items in the list, all of the items in the listand any combination of the items in the list, unless expressly limitedto one or the other. Any terms not expressly defined herein have theirconventional meaning as commonly understood by those having skill in therelevant art(s).

Various logic functional operations described herein may be implementedin logic that is referred to using a noun or noun phrase reflecting saidoperation or function. For example, an association operation may becarried out by an “associator” or “correlator”. Likewise, switching maybe carried out by a “switch”, selection by a “selector”, and so on.

The techniques disclosed herein provide uniform current consumption onwide data buses over time and scale without undue complexity tofour-byte wide buses. The techniques do to require special look-uptables and do not incur additional temporal overhead (that is, runningthe link faster than the baseline signaling rate) or additional signalwires. The techniques are well suited for use with receiver devices thatare unaware (not specially adapted for) of the encoding algorithm beingused at the transmitter. All decoding information that the receiver willneed to recover the data is conveyed by the polarity of the DBI bits.The technique may be applied in one or both bus directions for the link.

What is claimed is:
 1. A method for encoding data communicated over abus, the method comprising: determining a Hamming Distance, HD1 and HD2,respectively for a group 1 and a group 2 of the bus, each group having 8data lines and an associated DBI line, DBI1 and DBI2, respectively; andselectively inverting the data based on the Hamming Distance of thegroup 1 and the group
 2. 2. The method of claim 1, wherein selectivelyinverting the data communicated over the bus based on the HammingDistance comprises: performing a low-toggle encoding comprising: ifHD1≤4: set the DBI1=0; and do not invert the data of the group 1; ifHD1>4: set the DBI1=1; and invert the data of the group 1; if HD2≤4: setthe DBI2=0; and do not invert the data of the group 2; and if HD2>4: setthe DBI2=1; and invert the data of the group 2; and performing a secondencoding on a result of the low-toggle encoding, Data1′, Data2′, DBI1′,and DBI2′, comprising: determine an encoded Hamming Distance, HD1′ andHD2′, utilizing the Data1′ and the Data2′; if HD1′≤HD2′, invert theData2′ and the DBI2′; and if HD2′<HD1′, invert the Data1′ and the DBI1′.3. A method for encoding the data communicated over the bus, the methodcomprising: encoding the data and DBI values for the group 1 and thegroup 2 of the bus as per claim 2, each group having the 8 data linesand the associated DBI line, the DBI1 and the DBI2, respectively;encoding the data and the DBI values for a group 3 and a group 4 of thebus as per claim 2, each group having the 8 data lines and theassociated DBI line, DBI3 and DBI4, respectively; determining theHamming Distance, HD1″ and HD2″, respectively, for a group 1″ and agroup 2″, respectively, wherein the group 1″, DBI1“, the group 2”, andDBI2″ are results of the low-toggle encoding and the second encoding;determining the Hamming Distance, HD3″ and HD4″, for a group 3″ and agroup 4″, respectively, wherein the group 3″, DBI3″, the group 4″, andDBI4″ are results of the low-toggle encoding and the second encoding; ifHD1″+HD2″≤HD3″+HD4″: invert the DBI3″ and the DBI4″; and invert the dataof the group 3″ and the group 4″; and if HD1″+HD2″>HD3″+HD4″: invert theDBI1″ and the DBI2″; and invert the data of the group 1″ and the group2″.
 4. A method for encoding the data communicated over the bus, themethod comprising: encoding the data and the DBI values for the group 1,the group 2, the group 3, and the group 4 of the bus as per claim 3,each group having the 8 data lines and the associated DBI line, theDBI1, the DBI2, the DBI3, and the DBI4, respectively; encoding the dataand the DBI values for a group 5, a group 6, a group 7, and a group 8 ofthe bus as per claim 3, each group having the 8 data lines and theassociated DBI line, DBI5, DBI6, DBI7, and DBI8, respectively;determining the Hamming Distance, HD1′″, HD2′″, HD3′″, and HD4′″,respectively, for a group 1′″, a group 2′″, a group 3′″, and a group4′″, respectively, wherein the group 1′″, DBI1′″, the group 2′″, DBI2′″,the group 3′″, DBI3′″, the group 4′″, and the DBI4′″ are results of thelow-toggle encoding and the second encoding; determining the HammingDistance, HD5′″, HD6′″, HD7′″, and HD8′″, respectively, for a group 5′″,a group 6′″, a group 7′″, and a group 8′″, respectively, wherein thegroup 5′″, DBI5′″, the group 6′″, DBI6′″, the group 7′″, DBI7′″, thegroup 8′″, and the DBI8′″ are results of the low-toggle encoding and thesecond encoding; if HD1′″+HD2′″+HD3′″+HD4′″≤HD5′″+HD6′″+HD7″+HD8′″:invert the DBI5′″, the DBI6′″, the DBI7′″, and the DBI8′″; and invertthe data of the group 5′″, the group 6′″, the group 7′″, and the group8′″; and if HD1′″+HD2′″+HD3′″+HD4′″>HD5′″+HD6′″+HD7″+HD8′″: invert theDBI1′″, the DBI2′″, the DBI3′″, and the DBI4′″; and invert the data ofthe group 1′″, the group 2′″, the group 3′″, and the group 4′″.
 5. Amethod for encoding the data communicated over the bus, the methodcomprising: encoding the data and the DBI values for the group 1, thegroup 2, the group 3, and the group 4 of the bus as per claim 3, eachgroup having the 8 data lines and the associated DBI line, DBI1, DBI2,DBI3, and DBI4, respectively; encoding the data and the DBI values for agroup 5, a group 6, a group 7, and a group 8 of the bus as per claim 3,each group having the 8 data lines and the associated DBI line, DBI5,DBI6, DBI7, and DBI8, respectively; determining the Hamming Distance,HD1′″, HD2′″, HD3′″, and HD4′″, respectively, for group 1′″, group 2′″,group 3′″, and group 4′″, respectively, wherein the group 1′″, DBI1′″,the group 2′″, DBI2′″, the group 3′″, DBI3′″, the group 4′″, and theDBI4′″ are results of the low-toggle encoding and the second encoding;determining the Hamming Distance, HD5′″, HD6′″, HD7′″, and HD8′″,respectively, for group 5′″, group 6′″, group 7′″, and group 8′″,respectively, wherein the group 5′″, DBI5′″, the group 6′″, DBI6′″, thegroup 7′″, DBI7′″, the group 8′″, and the DBI8′″ are results of thelow-toggle encoding and the second encoding; ifHD1′″+HD2′″+HD3′″+HD4′″<HD5′″+HD6′″+HD7″+HD8′″: invert the DBI5′″, theDBI6′″, the DBI7′″, and the DBI8′″; and invert the data of the group5′″, the group 6′″, the group 7′″, and the group 8′″; and ifHD1′″+HD2′″+HD3′″+HD4′″≥HD5′″+HD6′″+HD7″+HD8′″: invert the DBI1′″, theDBI2′″, the DBI3′″, and the DBI4′″; and invert the data of the group1′″, the group 2′″, the group 3′″, and the group 4′″.
 6. The method ofclaim 3, wherein each group of the 8 data lines and the associated DBIline are assigned to the group 1, the group 2, the group 3, and thegroup 4 based on a physical location of each group.
 7. A method forencoding the data communicated over the bus, the method comprising:encoding the data and the DBI values for the group 1 and the group 2 ofthe bus as per claim 2, each group having the 8 data lines and theassociated DBI line, the DBI1 and the DBI2, respectively; encoding thedata and the DBI values for a group 3 and a group 4 of the bus as perclaim 2, each group having the 8 data lines and the associated DBI line,DBI3 and DBI4, respectively; determining the Hamming Distance, HD1″ andHD2″, respectively, for a group 1″ and a group 2″, respectively, whereinthe group 1″, DBI1“, the group 2”, and DBI2″ are results of thelow-toggle encoding and the second encoding; determining the HammingDistance, HD3″ and HD4″, for a group 3″ and a group 4″, respectively,wherein the group 3″, DBI3″, the group 4″, and DBI4″ are results of thelow-toggle encoding and the second encoding; if HD1″+HD2″<HD3″+HD4″:invert the DBI3″ and the DBI4″; and invert the data of the group 3″ andthe group 4″; and if HD1″+HD2″≥HD3″+HD4″: invert the DBI1″ and theDBI2″; and invert the data of the group 1″ and the group 2″.
 8. A methodfor encoding the data communicated over the bus, the method comprising:encoding the data and the DBI values for the group 1, the group 2, thegroup 3, and the group 4 of the bus as per claim 7, each group havingthe 8 data lines and the associated DBI line, the DBI1, the DBI2, theDBI3, and the DBI4, respectively; encoding the data and the DBI valuesfor a group 5, a group 6, a group 7, and a group 8 of the bus as perclaim 7, each group having the 8 data lines and the associated DBI line,DBI5, DBI6, DBI7, and DBI8, respectively; determining the HammingDistance, HD1′″, HD2′″, HD3′″, and HD4′″, respectively, for a group 1′″,a group 2′″, group 3′″, and group 4′″, respectively, wherein the group1′″, DBI1′″, the group 2′″, DBI2′″, the group 3′″, DBI3′″, the group4′″, and the DBI4′″ are results of the low-toggle encoding and thesecond encoding; determining the Hamming Distance, HD5′″, HD6′″, HD7′″,and HD8′″, respectively, for a group 5′″, a group 6′″, a group 7′″, anda group 8′″, respectively, wherein the group 5′″, DBI5′″, the group 6′″,DBI6′″, the group 7′″, DBI7′″, the group 8′″, and the DBI8′″ are resultsof the low-toggle encoding and the second encoding; ifHD1′″+HD2′″+HD3′″+HD4′″≤HD5′″+HD6′″+HD7″+HD8′″: invert the DBI5′″, theDBI6′″, the DBI7′″, and the DBI8′″; and invert the data of the group5′″, the group 6′″, the group 7′″, and the group 8′″; and ifHD1′″+HD2′″+HD3′″+HD4′″>HD5′″+HD6′″+HD7″+HD8′″: invert the DBI1′″, theDBI2′″, the DBI3′″, and the DBI4′″; and invert the data of the group1′″, the group 2′″, the group 3′″, and the group 4′″.
 9. A method forencoding the data communicated over the bus, the method comprising:encoding the data and the DBI values for the group 1, the group 2, thegroup 3, and the group 4 of the bus as per claim 7, each group havingthe 8 data lines and the associated DBI line, the DBI1, the DBI2, theDBI3, and the DBI4, respectively; encoding the data and the DBI valuesfor a group 5, a group 6, a group 7, and a group 8 of the bus as perclaim 7, each group having the 8 data lines and the associated DBI line,DBI5, DBI6, DBI7, and DBI8, respectively; determining the HammingDistance, HD1′″, HD2′″, HD3′″, and HD4′″, respectively, for a group 1′″,a group 2′″, a group 3′″, and a group 4′″, respectively, wherein thegroup 1′″, DBI1′″, the group 2′″, DBI2′″, the group 3′″, DBI3′″, thegroup 4′″, and the DBI4′″ are results of the low-toggle encoding and thesecond encoding; determining the Hamming Distance, HD5′″, HD6′″, HD7′″,and HD8′″, respectively, for a group 5′″, a group 6′″, a group 7′″, anda group 8′″, respectively, wherein the group 5′″, DBI5′″, the group 6′″,DBI6′″, the group 7′″, DBI7′″, the group 8′″, and the DBI8′″ are resultsof the low-toggle encoding and the second encoding; ifHD1′″+HD2′″+HD3′″+HD4′″<HD5′″+HD6′″+HD7″+HD8′″: invert the DBI5′″, theDBI6′″, the DBI7′″, and the DBI8′″; and invert the data of the group5′″, the group 6′″, the group 7′″, and the group 8′″; and ifHD1′″+HD2′″+HD3′″+HD4′″≥HD5′″+HD6′″+HD7″+HD8′″: invert the DBI1′″, theDBI2′″, the DBI3′″, and the DBI4′″; and invert the data of the group1′″, the group 2′″, the group 3′″, and the group 4′″.
 10. The method ofclaim 2, wherein a value of the DBI configures a decoder to invert ornot invert the data received at a receiver.
 11. The method of claim 1,wherein selectively inverting the data communicated over the bus basedon the Hamming Distance comprises: performing a low-toggle encodingcomprising: if HD1≤4: set the DBI1=0; and do not invert the data of thegroup 1; if HD1>4: set the DBI1=1; and invert the data of the group 1;if HD2≤4: set the DBI2=0; and do not invert the data of the group 2; andif HD2>4: set the DBI2=1; and invert the data of the group 2; andperforming a second encoding on a result of the low-toggle encoding,Data1′, Data2′, DBI1′, and DBI2′, comprising: determine an encodedHamming Distance, HD1′ and HD2′, utilizing the Data1′ and the Data2′; ifHD1′<HD2′, invert the Data2′ and the DBI2′; and if HD2′≤HD1′, invert theData1′ and the DBI1′.
 12. A system comprising: a transmitter coupled toa data bus comprising a plurality of groups of one or more lines; and anencoder coupled to the transmitter to: determine a Hamming Distancebetween a previous bus cycle and a next bus cycle for each of theplurality of groups of the one or more lines; and selectively invertdata bits of the next bus cycle transmitted by the transmitter on thedata bus based on the Hamming Distance of each of the plurality ofgroups of the one or more lines.
 13. The system of claim 12, wherein theplurality of groups comprises a first group and a second group and foreach group the one or more lines comprises 8 data lines and a data businversion line, the encoder selectively inverting the data bitstransmitted on the one or more lines by: determining the HammingDistance, HD1 and HD2, for the first group and the second group,respectively; and performing a low-toggle encoding comprising: if HD1≤4:set the data bus inversion line for the first group to 0, DBI1′=0; anddo not invert the data of the group 1, Data1′; if HD1>4: set the databus inversion line for the first group to 1, DBI1′=1; and invert thedata of the group 1, the Data1′; if HD2≤4: set the data bus inversionline for the second group to 0, DBI2′=0; and do not invert the data ofthe group 2, Data2′; and if HD2>4: set the data bus inversion line forthe second group to 1, DBI2′=1; and invert the data of the group 2, theData2′; and performing a second encoding on the Data1′, the Data2′, theDBI1′, and the DBI2′, comprising: determine an encoded Hamming Distance,HD1′ and HD2′, utilizing the Data1′ and the Data2′; if HD1′≤HD2′, invertthe Data2′ and the DBI2′; and if HD2′<HD1′, invert the Data1′ and theDBI1′.
 14. The system of claim 13, wherein the plurality of groupsfurther comprises a third group and a fourth group and for each groupthe one or more lines comprises the 8 data lines and the data businversion line, the encoder further configured to: selectively invertthe data bits and the data inversion bit for the third group and thefourth group as performed for the first group and the second group togenerate a first selectively inverted group, a second selectivelyinverted group, a third selectively inverted group, and a fourthselectively inverted group; and perform a third inversion on either (a)the first selectively inverted group and the second selectively invertedgroup or (b) the third selectively inverted group and the fourthselectively inverted group, the third inversion comprising: determiningthe combined Hamming Distance for the first selectively inverted groupand the second selectively inverted group and the combined HammingDistance for the third selectively inverted group and the fourthselectively inverted group; comparing the combined Hamming Distance forthe first selectively inverted group and the second selectively invertedgroup to the combined Hamming Distance for the third selectivelyinverted group and the fourth selectively inverted group; and invertingthe data bits and the data inversion bit of (a) the first selectivelyinverted group and the second selectively inverted group if the combinedHamming Distance of the first selectively inverted group and the secondselectively inverted group is greater than the combined Hamming Distanceof the third selectively inverted group and the fourth selectivelyinverted group or (b) the third selectively inverted group and thefourth selectively inverted group if the combined Hamming Distance ofthe third selectively inverted group and the fourth selectively invertedgroup is greater than or equal to the combined Hamming Distance of thefirst selectively inverted group and the second selectively invertedgroup.
 15. The system of claim 14, wherein the plurality of groupsfurther comprises a fifth group, a sixth group, a seventh group, and aneighth group and for each group the one or more lines comprises the 8data lines and the data bus inversion line, the encoder furtherconfigured to: selectively invert the data bits and the data inversionbit for the fifth group, the sixth group, the seventh group, and theeighth group as performed for the first group, the second group, thethird group, and the fourth group to generate the first selectivelyinverted group, the second selectively inverted group, the thirdselectively inverted group, the fourth selectively inverted group, afifth selectively inverted group, a sixth selectively inverted group, aseventh selectively inverted group, and an eighth selectively invertedgroup; and perform a fourth inversion on either (a) the firstselectively inverted group, the second selectively inverted group, thethird selectively inverted group, and the fourth selectively invertedgroup or (b) the fifth selectively inverted group, the sixth selectivelyinverted group, the seventh selectively inverted group, and the eighthselectively inverted group, the fourth inversion comprising: determiningthe combined Hamming Distance for the first selectively inverted group,the second selectively inverted group, the third selectively invertedgroup, and the fourth selectively inverted group and the combinedHamming Distance for the fifth selectively inverted group, the sixthselectively inverted group, the seventh selectively inverted group, andthe eighth selectively inverted group; comparing the combined HammingDistance for the first selectively inverted group, the secondselectively inverted group, the third selectively inverted group, andthe fourth selectively inverted group to the combined Hamming Distancefor the fifth selectively inverted group, the sixth selectively invertedgroup, the seventh selectively inverted group, and the eighthselectively inverted group; and inverting the data bits and the datainversion bit of (a) the first selectively inverted group, the secondselectively inverted group, the third selectively inverted group, andthe fourth selectively inverted group if the combined Hamming Distanceof the first selectively inverted group, the second selectively invertedgroup, the third selectively inverted group, and the fourth selectivelyinverted group is greater than the combined Hamming Distance of thefifth selectively inverted group, the sixth selectively inverted group,the seventh selectively inverted group, and the eighth selectivelyinverted group or (b) the fifth selectively inverted group, the sixthselectively inverted group, the seventh selectively inverted group, andthe eighth selectively inverted group if the combined Hamming Distanceof the fifth selectively inverted group, the sixth selectively invertedgroup, the seventh selectively inverted group, and the eighthselectively inverted group is greater than or equal to the combinedHamming Distance of the first selectively inverted group, the secondselectively inverted group, the third selectively inverted group, andthe fourth selectively inverted group.
 16. The system of claim 14,wherein the plurality of groups further comprises a fifth group, a sixthgroup, a seventh group, and an eighth group and for each group the oneor more lines comprises the 8 data lines and the data bus inversionline, the encoder further configured to: selectively invert the databits and the data inversion bit for the fifth group, the sixth group,the seventh group, and the eighth group as performed for the firstgroup, the second group, the third group, and the fourth group togenerate the first selectively inverted group, the second selectivelyinverted group, the third selectively inverted group, the fourthselectively inverted group, a fifth selectively inverted group, a sixthselectively inverted group, a seventh selectively inverted group, and aneighth selectively inverted group; and perform a fourth inversion oneither (a) the first selectively inverted group, the second selectivelyinverted group, the third selectively inverted group, and the fourthselectively inverted group or (b) the fifth selectively inverted group,the sixth selectively inverted group, the seventh selectively invertedgroup, and the eighth selectively inverted group, the fourth inversioncomprising: determining the combined Hamming Distance for the firstselectively inverted group, the second selectively inverted group, thethird selectively inverted group, and the fourth selectively invertedgroup and the combined Hamming Distance for the fifth selectivelyinverted group, the sixth selectively inverted group, the seventhselectively inverted group, and the eighth selectively inverted group;comparing the combined Hamming Distance for the first selectivelyinverted group, the second selectively inverted group, the thirdselectively inverted group, and the fourth selectively inverted group tothe combined Hamming Distance for the fifth selectively inverted group,the sixth selectively inverted group, the seventh selectively invertedgroup, and the eighth selectively inverted group; and inverting the databits and the data inversion bit of (a) the first selectively invertedgroup, the second selectively inverted group, the third selectivelyinverted group, and the fourth selectively inverted group if thecombined Hamming Distance of the first selectively inverted group, thesecond selectively inverted group, the third selectively inverted group,and the fourth selectively inverted group is greater than or equal tothe combined Hamming Distance of the fifth selectively inverted group,the sixth selectively inverted group, the seventh selectively invertedgroup, and the eighth selectively inverted group or (b) the fifthselectively inverted group, the sixth selectively inverted group, theseventh selectively inverted group, and the eighth selectively invertedgroup if the combined Hamming Distance of the fifth selectively invertedgroup, the sixth selectively inverted group, the seventh selectivelyinverted group, and the eighth selectively inverted group is greaterthan the combined Hamming Distance of the first selectively invertedgroup, the second selectively inverted group, the third selectivelyinverted group, and the fourth selectively inverted group.
 17. Thesystem of claim 14, wherein the encoder assigns each group of the 8 datalines and the data bus inversion line to the first group, the secondgroup, the third group, and the fourth group based on a physicallocation of each group.
 18. The system of claim 13, wherein theplurality of groups further comprises a third group and a fourth groupand for each group the one or more lines comprises the 8 data lines andthe data bus inversion line, the encoder further configured to:selectively invert the data bits and the data inversion bit for thethird group and the fourth group as performed for the first group andthe second group to generate a first selectively inverted group, asecond selectively inverted group, a third selectively inverted group,and a fourth selectively inverted group; and perform a third inversionon either (a) the first selectively inverted group and the secondselectively inverted group or (b) the third selectively inverted groupand the fourth selectively inverted group, the third inversioncomprising: determining the combined Hamming Distance for the firstselectively inverted group and the second selectively inverted group andthe combined Hamming Distance for the third selectively inverted groupand the fourth selectively inverted group; comparing the combinedHamming Distance for the first selectively inverted group and the secondselectively inverted group to the combined Hamming Distance for thethird selectively inverted group and the fourth selectively invertedgroup; and inverting the data bits and the data inversion bit of (a) thefirst selectively inverted group and the second selectively invertedgroup if the combined Hamming Distance of the first selectively invertedgroup and the second selectively inverted group is greater than or equalto the combined Hamming Distance of the third selectively inverted groupand the fourth selectively inverted group or (b) the third selectivelyinverted group and the fourth selectively inverted group if the combinedHamming Distance of the third selectively inverted group and the fourthselectively inverted group is greater than the combined Hamming Distanceof the first selectively inverted group and the second selectivelyinverted group.
 19. The system of claim 18, wherein the plurality ofgroups further comprises a fifth group, a sixth group, a seventh group,and an eighth group and for each group the one or more lines comprisesthe 8 data lines and the data bus inversion line, the encoder furtherconfigured to: selectively invert the data bits and the data inversionbit for the fifth group, the sixth group, the seventh group, and theeighth group as performed for the first group, the second group, thethird group, and the fourth group to generate the first selectivelyinverted group, the second selectively inverted group, the thirdselectively inverted group, the fourth selectively inverted group, afifth selectively inverted group, a sixth selectively inverted group, aseventh selectively inverted group, and an eighth selectively invertedgroup; and perform a fourth inversion on either (a) the firstselectively inverted group, the second selectively inverted group, thethird selectively inverted group, and the fourth selectively invertedgroup or (b) the fifth selectively inverted group, the sixth selectivelyinverted group, the seventh selectively inverted group, and the eighthselectively inverted group, the fourth inversion comprising: determiningthe combined Hamming Distance for the first selectively inverted group,the second selectively inverted group, the third selectively invertedgroup, and the fourth selectively inverted group and the combinedHamming Distance for the fifth selectively inverted group, the sixthselectively inverted group, the seventh selectively inverted group, andthe eighth selectively inverted group; comparing the combined HammingDistance for the first selectively inverted group, the secondselectively inverted group, the third selectively inverted group, andthe fourth selectively inverted group to the combined Hamming Distancefor the fifth selectively inverted group, the sixth selectively invertedgroup, the seventh selectively inverted group, and the eighthselectively inverted group; and inverting the data bits and the datainversion bit of (a) the first selectively inverted group, the secondselectively inverted group, the third selectively inverted group, andthe fourth selectively inverted group if the combined Hamming Distanceof the first selectively inverted group, the second selectively invertedgroup, the third selectively inverted group, and the fourth selectivelyinverted group is greater than the combined Hamming Distance of thefifth selectively inverted group, the sixth selectively inverted group,the seventh selectively inverted group, and the eighth selectivelyinverted group or (b) the fifth selectively inverted group, the sixthselectively inverted group, the seventh selectively inverted group, andthe eighth selectively inverted group if the combined Hamming Distanceof the fifth selectively inverted group, the sixth selectively invertedgroup, the seventh selectively inverted group, and the eighthselectively inverted group is greater than or equal to the combinedHamming Distance of the first selectively inverted group, the secondselectively inverted group, the third selectively inverted group, andthe fourth selectively inverted group.
 20. The system of claim 18,wherein the plurality of groups further comprises a fifth group, a sixthgroup, a seventh group, and an eighth group and for each group the oneor more lines comprises the 8 data lines and the data bus inversionline, the encoder further configured to: selectively invert the databits and the data inversion bit for the fifth group, the sixth group,the seventh group, and the eighth group as performed for the firstgroup, the second group, the third group, and the fourth group togenerate the first selectively inverted group, the second selectivelyinverted group, the third selectively inverted group, the fourthselectively inverted group, a fifth selectively inverted group, a sixthselectively inverted group, a seventh selectively inverted group, and aneighth selectively inverted group; and perform a fourth inversion oneither (a) the first selectively inverted group, the second selectivelyinverted group, the third selectively inverted group, and the fourthselectively inverted group or (b) the fifth selectively inverted group,the sixth selectively inverted group, the seventh selectively invertedgroup, and the eighth selectively inverted group, the fourth inversioncomprising: determining the combined Hamming Distance for the firstselectively inverted group, the second selectively inverted group, thethird selectively inverted group, and the fourth selectively invertedgroup and the combined Hamming Distance for the fifth selectivelyinverted group, the sixth selectively inverted group, the seventhselectively inverted group, and the eighth selectively inverted group;comparing the combined Hamming Distance for the first selectivelyinverted group, the second selectively inverted group, the thirdselectively inverted group, and the fourth selectively inverted group tothe combined Hamming Distance for the fifth selectively inverted group,the sixth selectively inverted group, the seventh selectively invertedgroup, and the eighth selectively inverted group; and inverting the databits and the data inversion bit of (a) the first selectively invertedgroup, the second selectively inverted group, the third selectivelyinverted group, and the fourth selectively inverted group if thecombined Hamming Distance of the first selectively inverted group, thesecond selectively inverted group, the third selectively inverted group,and the fourth selectively inverted group is greater than or equal tothe combined Hamming Distance of the fifth selectively inverted group,the sixth selectively inverted group, the seventh selectively invertedgroup, and the eighth selectively inverted group or (b) the fifthselectively inverted group, the sixth selectively inverted group, theseventh selectively inverted group, and the eighth selectively invertedgroup if the combined Hamming Distance of the fifth selectively invertedgroup, the sixth selectively inverted group, the seventh selectivelyinverted group, and the eighth selectively inverted group is greaterthan the combined Hamming Distance of the first selectively invertedgroup, the second selectively inverted group, the third selectivelyinverted group, and the fourth selectively inverted group.